Browsing by Author "Dundar, G."
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ArticlePublication Metadata only A 130 nm CMOS receiver for visible light communication(IEEE, 2022-06-15) Kısacık, Rıfat; Yagan, M. Y.; Uysal, Murat; Pusane, A. E.; Baykas, T.; Dundar, G.; Yalcinkaya, A. D.; Electrical & Electronics Engineering; UYSAL, Murat; Kısacık, RıfatVisible light communication (VLC) is an emerging technology that has been gaining attention over the last few years. Transmission of data at higher rates in a VLC system is mainly limited by the modulation bandwidth of the employed LED. To alleviate this limitation, equalization is frequently employed. This is usually achieved by either using discrete circuit elements or in digital form. In this paper, we present a power-efficient VLC receiver as a system-on-chip, implemented in 130 nm CMOS technology. The proposed receiver supports LEDs with different bandwidths thanks to the switchable equalizer. We tested the proposed receiver using phosphorescent white LEDs with different bandwidths on an experimental VLC link. For each tested LED, around 20 fold improvement in data rate was achieved compared to the original bandwidth of the LED. For the LED with a modulation bandwidth of 1.6 MHz, data rates of 32 Mbps and 50 Mbps at a BER of 102 were obtained at a distance of 2 meters without and with a blue filter, respectively.Conference paperPublication Metadata only Experimental validation of a novel RLL code for visible light communication(IEEE, 2020) Yagan, M. Y.; Kısacık, Rıfat; Erkinaci, T.; Pusane, A. E.; Uysal, Murat; Baykas, T.; Dundar, G.; Yalcinkaya, A. D.; Electrical & Electronics Engineering; Herencsar, N.; UYSAL, Murat; Kısacık, RıfatFlicker arising in visible light communication (VLC) system is typically mitigated by run-length-limited (RLL) codes. The IEEE 802.15.7 standard proposes RLL codes according to the modulation type and data rate. In this paper, we propose a new RLL code and present the encoding and decoding operations for use in VLC systems. We provide experimental results for bit error rate (BER) for transmission of uncoded, 8B10B-coded and proposed code at different data rates in a VLC setup. We experimentally demonstrate that the proposed code performs close to the 8B10B code. The proposed code achieves a BER of 10(-5) at 50 Mbps where transmitting the uncoded data at the same rate results in the BER of 10(-3).Conference paperPublication Metadata only A fast circuit topology for finding the maximum of n k-bit numbers(IEEE, 2013) Yuce, B.; Uğurdağ, Hasan Fatih; Gören, S.; Dundar, G.; Electrical & Electronics Engineering; UĞURDAĞ, Hasan FatihFinding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (low-latency) circuits to carry out this operation. We propose a fast circuit topology called Array-Based maximum finder (AB) to determine both value and address of the maximum element within an n-element set of k-bit binary numbers. AB is based on carrying out all of the required comparisons in parallel and then simultaneously computing the address as well as the value of the maximum element. This approach ends up with only one comparator on the critical path, followed by some selection logic. The time complexity of the proposed architecture is O(log2n + log2k) whereas the area complexity is O(n2k). We developed RTL code generators for AB as well as its competitors. These generators are scalable to any value of n and k. We applied a standard-cell based iterative synthesis flow that finds the optimum time constraint through binary search. The synthesis results showed that AB is 1.2-2.1 times (1.6 times on the average) faster than the state-of-the-art.