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Enabling difference-based dynamic partial self reconfiguration for large differences
(IEEE, 2013)
This paper presents a new Dynamic Partial Self Reconfiguration (DPSR) flow for Xilinx FPGAs. Leveraging the Xilinx FPGA Editor and PlanAhead tools, we provide two implementation approaches that enable partial reconfiguration ...
FPGA based particle identification in high energy physics experiments
(IEEE, 2012)
High energy physics experiments require on-the-fly processing of signals from many particle detectors. Such signals contain a high and fluctuating rate of pulses. Pulse shape hints particle type, and the amplitude relates ...
Darbe i̇şaretleri̇ i̇çi̇n aşırı-hızlı FPGA tabanlı eǧri̇ beti̇mlenmesi̇
(IEEE, 2012)
Bu çalışmada anlatılan donanım 1.5 GHz Analog-Sayısal- Çevirici’den gelen darbe işaret dizisini işleyebilmekte ve darbe işaretlerini genlik, yükselme/düşme süresi ve varış zamanı parametreleriyle özetleyebilmektedir. Söz ...
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