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Now showing items 11-13 of 13
Efficient combinational circuits for division by small integer constants
(IEEE, 2016)
Division of an integer by an integer constant is a widely used operation and hence justifies a customized efficient implementation. There are various versions of this operation. This paper attacks a particular version of ...
A fast circuit topology for finding the maximum of n k-bit numbers
(IEEE, 2013)
Finding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (low-latency) ...
Software UART: A use case for VSCPU worst-case execution time analyzer
(IEEE, 2019)
This paper presents our early results of the development of a Worst-Case Execution Time (WCET) analyzer for VSCPU by implementing a software UART system. Our WCET analyzer takes a C program as input and gives the time taken ...
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