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CPU design simplified
(IEEE, 2018-12-10)
The first goal of this paper is to introduce a simple and customizable soft CPU named VerySimpleCPU (VSCPU), which could be easily implemented on FPGAs with a complete toolchain including instruction set simulator, assembler, ...
VISOR: A fast image processing pipeline with scaling and translation invariance for test oracle automation of visual output systems
(The ACM Digital Library, 2018-02)
A test oracle automation approach proposed for systems that produce visual output.Root causes of accuracy issues analyzed for test oracles based on image comparison.Image processing techniques employed to improve the ...
A sparse matrix‐vector multiplication method with low preprocessing cost
(Wiley, 2018-11-10)
Sparse matrix-vector multiplication (SpMV) is a crucial operation used for solving many engineering and scientific problems. In general, there is no single SpMV method that gives high performance for all sparse matrices. ...
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