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Fast multiplier generator for FPGAs with LUT based partial product generation and column/row compression
(Elsevier, 2017)
We present a new parallel integer multiplier generator for FPGAs. It combines (i) a new Generalized Parallel Counter (GPC) grouping algorithm for column compression with (ii) a LUT based partial product generation, is (iii) ...
Crucial topics in computer architecture education and a survey of textbooks and papers
(International Association of Engineers, 2020)
We have been teaching undergraduate computer architecture since 2012 in an unconventional way. Most undergraduate computer architecture courses are based on microprocessors, and they quickly move into advanced topics such ...
PYNQ-based rapid FPGA implementation of quantum key distribution
(IEEE, 2021)
In this paper, we present a real-time Quantum Key Distribution (QKD) implementation on Field Programmable Gate Arrays (FPGAs) for secure communication. We propose a novel methodology with a Python-based programming interface ...
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