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FPGA bitstream protection with PUFs, obfuscation, and multi-boot
(IEEE, 2011)
With the combination of PUFs, obfuscation, and multi-boot, we are able to do the equivalent of partial bitstream encryption on low-cost FPGAs, which is only featured on high-end FPGAs. Low-cost FPGAs do not even have ...
RoCoCo: row and column compression for high-performance multiplication on FPGAs
(IEEE, 2011)
Multiplication is, in no doubt, one of the top few frequently used operations in hardware and software. In high-performance hardware design, after high-level optimizations are exhausted, component level optimizations are ...
Defect-aware nanocrossbar logic mapping through matrix canonization using two-dimensional radix sort
(ACM, 2011-08)
Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and utilization requires logic mapping that is ...
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