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A 1GS/s, 9-bits DAC interleaved (2+1)-bit then 2-bit per cycle SAR ADC
(Istanbul University, 2020-07)
This paper presents a high speed Successive Approximation Register Analog to Digital Converter (SAR ADC) for low-noise low-power satellite transceiver applications. The system is a (2+1) then 2-bit per cycle SAR ADC of ...
Low-cost thin-film passive RFID circuits and detector system
(Cambridge University Press, 2020-06)
This paper discusses the design of chip-less RFID tags of a standard pocket size of 69 mm by 156 mm. These tags are based on lumped elements of copper metal traces constructed on a thin polyamide flexible substrate. Moreover, ...
Resonance-filtering combo system for continuous wireless charging range coverage
(Cambridge University Press, 2020-09)
Distribution of wireless power charging field uniformly on a large area pad is critical for power receivers, particularly for wearable devices, wherein small form factor coils are involved. Since the receiver coil size is ...
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