Browsing by Author "1"
Now showing items 881-900 of 2849
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Foreword
Beğen, Ali Cengiz; Timmerer, C.; Zimmermann, R.; Schierl, T. (Association for Computing Machinery, Inc, 2018-06-12)N/A -
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Foreword
Sassatell, L.; Lee J.-S., J.-S.; Civanlar, Mehmet Reha (Association for Computing Machinery, Inc, 2020)N/A -
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Formant position based weighted spectral features for emotion recognition
Bozkurt, E.; Erzin, E.; Eroğlu Erdem, Ç.; Erdem, Tanju (Elsevier, 2011)In this paper, we propose novel spectrally weighted mel-frequency cepstral coefficient (WMFCC) features for emotion recognition from speech. The idea is based on the fact that formant locations carry emotion-related ... -
FORMAT: a tool for adapting test models based on feature models
Ergun, B.; Gebizli, C. Ş.; Sözer, Hasan (IEEE, 2017)We introduce a tool that facilitates the reuse of test models for a family of systems. Test models are defined as hierarchical Markov chains for specifying possible usage of features for these systems. Variability among ... -
The formation process of public space: from urban fabric to palaces and squares
Camiz, Alessandro (U+D Edition, Rome, 2018)The formation process of public spaces within the modern city has ancient origins: although generally referenced to the model of the great public spaces of Republican and imperial Rome (forum), the “common” urban space of ... -
The formation, evolution and replacement of price-quality relationships
Pauwels, Koen Hendrik; D’Aveni, R. (Springer Science+Business Media, 2016-01)This paper develops a theoretical framework to address how dynamic competitive interactions and customer preferences change the observed relationship between market price and quality, and it offers an empirical framework ... -
Formulations and branch-and-cut algorithms for the generalized vehicle routing problem
Bektaş, T.; Erdoğan, Güneş; Ropke, S. (Informs, 2011-08)The generalized vehicle routing problem (GVRP) consists of finding a set of routes for a number of capacitated vehicles on a graph where the vertices are partitioned into clusters with given demands, such that the total ... -
Forward-backward asymmetry of Drell-Yan lepton pairs in pp collisions at root s=7 TeV
Chatrchyan, S.; Işıldak, Bora (Elsevier, 2013-01-08)A measurement of the forward-backward asymmetry (A(FB)) of Drell-Yan lepton pairs in pp collisions at root s = 7 TeV is presented. The data sample, collected with the CMS detector, corresponds to an integrated luminosity ... -
Forward–backward asymmetry of Drell–Yan lepton pairs in pp collisions at √s = 8 TeV
V. Khachatryan; Işıldak, Bora (Springer Nature, 2016-06)A measurement of the forward–backward asymmetry AFB of oppositely charged lepton pairs ( μμ and ee ) produced via Z/γ∗ boson exchange in pp collisions at s√=8 TeV is presented. The data sample corresponds to an ... -
FOVLC: Foveation based data hiding in display transmitters for visible light communications
Yıldız, Özgür (2018-05)Visible light communications is an emerging architecture with unlicensed and huge bandwidth resources, security, and experimental implementations and standardization e orts. Display based transmitter and camera based ... -
FoVLC: foveation based data hiding in display transmitters for visible light communications
Yıldız, Ö.; Gülbahar, Burhan (IEEE, 2018-08-28)Visible light communications is an emerging architecture with unlicensed and huge bandwidth resources, security, and experimental implementations and standardization efforts. Display based transmitter and camera based ... -
FPGA based particle identification in high energy physics experiments
Uğurdağ, Hasan Fatih; Başaran, A.; Akdogan, T.; Güney, V. U.; Gören, S. (IEEE, 2012)High energy physics experiments require on-the-fly processing of signals from many particle detectors. Such signals contain a high and fluctuating rate of pulses. Pulse shape hints particle type, and the amplitude relates ... -
FPGA implementation of a dense optical flow algorithm using altera OpenCL SDK
Ulutaş, Umut (2017-08)FPGA acceleration of compute-intensive algorithms is usually not regarded feasible because of the long Verilog or VHDL RTL design efforts they require. Data-parallel algorithms have an alternative platform for acceleration, ... -
FPGA implementation of a low latency and high SFDR direct digital synthesizer for resource-efficient quantum-enhanced communication
Annafıanto, Nur Fajar Rızqı; Jabir, M. V.; Burenkov, I. A.; Uğurdağ, Hasan Fatih; Battou, A.; Polyakov, S. V. (IEEE, 2020-09)A Direct Digital Synthesizer (DDS) generates a sinusoidal signal, which is a significant component of many communication systems using modulation schemes. A CORDIC algorithm offers minimum memory requirements compared to ... -
Fractionally spaced equalization for broadband amplify-and-forward cooperative systems
Heidarpour, M. R.; Uysal, Murat; Damen, M. O. (IEEE, 2013)In this paper, we revisit the concept of fractionally spaced equalization (FSE) for broadband single-carrier amplify-and-forward (AaF) cooperative systems. Particularly, we investigate fractionally spaced frequency domain ...
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