Browsing by Author "(ORCID 0000-0002-6256-0850 & YÖK ID 118293) Uğurdağ, Fatih"
Now showing items 41-60 of 60
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Output domain downscaler
Büyükmıhçı, M.; Levent, Vecdi Emre; Guzel, Aydın Emre; Ates, Ozgur; Tosun, Mustafa; Akgün, T.; Erbas, C.; Gören, S.; Uğurdağ, Hasan Fatih (ISCIS 2016: Computer and Information Sciences, 2016)This paper offers an area-efficient video downscaler hardware architecture, which we call Output Domain Downscaler (ODD). ODD is demonstrated through an implementation of the bilinear interpolation method combined with ... -
Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration
Gören, S.; Ozkurt, O.; Yildiz, A.; Uğurdağ, Hasan Fatih; Chakraborty, R. S.; Mukhopadhyay, D. (Elsevier, 2013-02)This paper proposes a technique based on Physical Unclonable Functions (PUFs), obfuscation, and Dynamic Partial Self Reconfiguration (DPSR) to protect partial FPGA configuration bitstreams from cloning and reverse engineering. ... -
Preface
Maniatakos, M.; Elfadel, I. A. M.; Sonza Reorda, M.; Uğurdağ, Hasan Fatih; Monteiro, J.; Reis, R. (Springer Nature, 2019)N/A -
Preface
Orailoğlu, A.; Uğurdağ, Hasan Fatih; Silveira, L. M.; Margala, M.; Reis, R. (Springer Science+Business Media, 2015) -
PYNQ-based rapid FPGA implementation of quantum key distribution
Bilgin, Yiğit; Tesfay, Shewıt Weldu; İpek, Seçkin; Uğurdağ, Hasan Fatih; Durak, Kadir; Gören, S. (IEEE, 2021)In this paper, we present a real-time Quantum Key Distribution (QKD) implementation on Field Programmable Gate Arrays (FPGAs) for secure communication. We propose a novel methodology with a Python-based programming interface ... -
Rapid design of real-time image fusion on FPGA using HLS and other techniques
Aydın, Furkan; Uğurdağ, Hasan Fatih; Levent, Vecdi Emre; Güzel, Aydın Emre; Annafianto, Nur Fajar Rızqı; Özkan, M. A.; Akgun, T.; Erbas, C. (IEEE, 2018)During the process of implementing a parameterized hardware IP generator for an image fusion algorithm, we had a chance to test various tools and techniques such as HLS, pipelining, and PCIe logic/software porting, which ... -
Referanssız görüntü bloklanma ölçümü için yeni bir yöntem
Ozansoy, Koray; Özer, N.; Dönmez, F.; Uğurdağ, Hasan Fatih (IEEE, 2014)Internet’te ve servis sağlayıcı ağlarında video trafiğinin tavan yaptığı günümüzde otomatik görüntü kalitesi ölçümünün faydaları aşikardır. Bu ölçümlerin birçok uygulamada gerçekzamanlı yapılması gerekir ve de bu “Referanssız” ... -
RImCom: raster-order image compressor for embedded video applications
Palaz, Okan; Uğurdağ, Hasan Fatih; Ozkurt, O.; Kertmen, B.; Donmez, F. (Springer International Publishing, 2017)This paper presents a real-time, rate controlled, end-to-end (encoder and decoder) hardware solution for memory compression of raster-order video streams—named RImCom (short for Raster-order Image Compression). RImCom ... -
A robotics summer camp for high school students: pipelines activities promoting careers in engineering fields
Ayar, M.; Yalvaç, B.; Uğurdağ, Hasan Fatih; Şahin, A. (American Society for Engineering Education, 2013-06)In this paper we discuss the lived-experiences and the career interests of 27 high school students who participated in a two-week Robotics summer camp in 2012. The summer camp was designed by a team of engineering faculty, ... -
RoCoCo: row and column compression for high-performance multiplication on FPGAs
Uğurdağ, Hasan Fatih; Keskin, O.; Tunç, Cihan; Temizkan, Fatih; Fici, G.; Dedeoğlu, S. (IEEE, 2011)Multiplication is, in no doubt, one of the top few frequently used operations in hardware and software. In high-performance hardware design, after high-level optimizations are exhausted, component level optimizations are ... -
Semi- and fully-random access LUTs for smooth functions
Gener, Y. S.; Aydın, F.; Gören, S.; Uğurdağ, Hasan Fatih (Springer, 2020)Look-Up Table (LUT) implementation of complicated functions often offers lower latency compared to algebraic implementations at the expense of significant area penalty. If the function is smooth, MultiPartite table method ... -
SOC estimation for li-Ion batteries using extended kalman filter with PID controlled process noise according to the voltage error
Çelik, Mert; Gözüküçük, Mehmet Ali; Akdoğan, Taylan; Uğurdağ, Hasan Fatih (IEEE, 2019)State of Charge (SOC) estimation is critical for battery powered devices in order to find out the remaining charge level. This process is relatively straightforward when the battery is in the resting state. However, it can ... -
Software defined VLC system: implementation and performance evaluation
Hussain, Waqas; Uğurdağ, Hasan Fatih; Uysal, Murat (IEEE, 2015)This paper presents the implementation of an IEEE standard-based Visible Light Communication (VLC) system using software defined radio (SDR) approach. Based on widely used SDR platform Universal Software Radio Peripheral ... -
Software UART: A use case for VSCPU worst-case execution time analyzer
Yıldız, A.; İskender, Deniz; Özlü, G.; Uğurdağ, Hasan Fatih; Aktemur, Tankut Barış; Gören, S. (IEEE, 2019)This paper presents our early results of the development of a Worst-Case Execution Time (WCET) analyzer for VSCPU by implementing a software UART system. Our WCET analyzer takes a C program as input and gives the time taken ... -
Synthesis of clock trees for sampled-data analog IC blocks
Yüce, B.; Korkmaz, S.; Esen, V. B.; Temizkan, Fatih; Tunç, Cihan; Güner, Gökhan; Başkaya, I. F.; Agi, İ.; Dündar, G.; Uğurdağ, Hasan Fatih (IEEE, 2013)This paper describes a methodology for automated design of clock trees in Sampled-Data Analog Circuits (SDACs). The current practice in the industry and academia for clock tree design of SDACs is a manual process, which ... -
Tools and techniques for implementation of real-time video processing algorithms
Levent, Vecdi Emre; Güzel, Aydın Emre; Tosun, M.; Büyükmıhcı, Mert; Aydın, Furkan; Goren, S.; Erbas, C.; Akgun, T.; Uğurdağ, Hasan Fatih (Springer Nature, 2019-01)This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques ... -
Using deep compression on PyTorch models for autonomous systems
Doğan, Eren; Uğurdağ, Hasan Fatih; Ünlü, Hasan (IEEE, 2022)Applications of artificial neural networks on low-cost embedded systems and microcontrollers (MCUs), has recently been attracting more attention than ever. Since MCUs have limited memory capacity as well as limited ... -
Using high-level synthesis for rapid design of video processing pipes
Güzel, Aydin Emre; Levent, Vecdi Emre; Tosun, Mustafa; Özkan, M. Akif; Akgun, T.; Büyükaydın, D.; Erbas, C.; Uğurdağ, Hasan Fatih (IEEE, 2016)In this work, we share our experience in using High-Level Synthesis (HLS) for rapid development of an optical flow design on FPGA. We have performed HLS using Vivado HLS as well as a HLS tool we have developed for the ... -
Welcome from the general chairs
Uğurdağ, Hasan Fatih; Silveira, L. M. (IEEE, 2013) -
Welcome note from the general chairs
Elfadel, I. A. M.; Uğurdağ, Hasan Fatih (IEEE, 2017-12-13)The following topics are dealt with: low-power electronics; system-on-chip; integrated circuit design; CMOS integrated circuits; microprocessor chips; SRAM chips; logic design; flip-flops; power aware computing; MOSFET circuits.
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