Browsing Faculty of Engineering by OzU Authors "Uğurdağ, Hasan Fatih"
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25th IFIP/IEEE conference on very large scale integration (VLSISoC 2017)
Elfadel, I. A. M.; Uğurdağ, Hasan Fatih (IEEE, 201802)The 25th IFIP/IEEE Conference on Very Large Scale Integration (VLSISoC 2017) was held between 23 and 25 October in the landmark Yas Viceroy Hotel, overlooking the Formula 1 Yas Marina racetrack in Yas Island, Abu Dhabi, ... 
An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Uğurdağ, Hasan Fatih; Goren, S.; Aydin, N. (IEEE, 2015)Biomedical signals (BSs), which give information about the normal condition and also the inherent irregularities of our body, are expected to have nonstationary character due to the timevarying behavior of physiological ... 
Combined AES + AEGIS architectures for high performance and lightweight security applications
Şahin, Furkan; Uğurdağ, Hasan Fatih; Yalçın, T. (Springer International Publishing, 2014)AES has been the prominent block cipher since its introduction as the standard. It has been the cipher used in almost all new applications that require solid, unbreakable security with reasonable resource usage. Several ... 
Costbenefit approach to degradation of electrolytic capacitors
Kirişken, B.; Uğurdağ, Hasan Fatih (IEEE, 2014)Aluminum electrolytic capacitors are widely used as a filter or bulky capacitor after rectification stages of switching power supplies (SMPS). Flyback, forward, and resonant converter topologies, which are widely used in ... 
CPU design simplified
Yıldız, A.; Uğurdağ, Hasan Fatih; Aktemur, Tankut Barış; İskender, Deniz; Gören, S. (IEEE, 20181210)The first goal of this paper is to introduce a simple and customizable soft CPU named VerySimpleCPU (VSCPU), which could be easily implemented on FPGAs with a complete toolchain including instruction set simulator, assembler, ... 
Darbe i̇şaretleri̇ i̇çi̇n aşırıhızlı FPGA tabanlı eǧri̇ beti̇mlenmesi̇
Başaran, A.; Uğurdağ, Hasan Fatih; Akdoğan, T.; Güney, V. U.; Gören, S. (IEEE, 2012)Bu çalışmada anlatılan donanım 1.5 GHz AnalogSayısal Çevirici’den gelen darbe işaret dizisini işleyebilmekte ve darbe işaretlerini genlik, yükselme/düşme süresi ve varış zamanı parametreleriyle özetleyebilmektedir. Söz ... 
Defectaware nanocrossbar logic mapping through matrix canonization using twodimensional radix sort
Gören, S.; Uğurdağ, Hasan Fatih; Palaz, O. (ACM, 201108)Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuckopen/closed, broken nanowires. Achieving reasonable yield and utilization requires logic mapping that is ... 
Design and simulation of an optimal energy management strategy for plugIn electric vehicles
Gözüküçük, M. A.; Akdoğan, Taylan; Hussain, Waqas; Tasooji, Tohid Kargar; Şahin, Mert; Çelik, M.; Uğurdağ, Hasan Fatih (IEEE, 2018)Energy management algorithms play a critical role in improving the energy efficiency of modern electric vehicles. In order to be desirable for the customer, electric vehicles should be capable of long distance driving on ... 
Efficient combinational circuits for division by small integer constants
Uğurdağ, Hasan Fatih; Bayram, A.; Levent, Vecdi Levent; Gören, S. (IEEE, 2016)Division of an integer by an integer constant is a widely used operation and hence justifies a customized efficient implementation. There are various versions of this operation. This paper attacks a particular version of ... 
Electric vehicle model parameter estimation with combined least squares and gradient descent method
Gözüküçük, Mehmet Ali; Uğurdağ, Hasan Fatih; Dedeköy, Mert; Çelik, Mert; Akdoğan, Taylan (IEEE, 2019)Energy management algorithms have a crucial role in electric vehicles due to their limited driving range. For an energy management algorithm to be effective, we should model the vehicle as accurately as possible. That is, ... 
Enabling differencebased dynamic partial self reconfiguration for large differences
Gören, S.; Özkurt, Ö.; Türk, Y.; Yıldız, A.; Uğurdağ, Hasan Fatih (IEEE, 2013)This paper presents a new Dynamic Partial Self Reconfiguration (DPSR) flow for Xilinx FPGAs. Leveraging the Xilinx FPGA Editor and PlanAhead tools, we provide two implementation approaches that enable partial reconfiguration ... 
Experiences on the road from EDA developer to designer to educator
Uğurdağ, Hasan Fatih (IEEE, 2013)This paper will coin some concepts that came to being as an engineer once made a journey from EDA developer of a behavioral synthesis tool to RTL designer and then on to academia. The EDA developer in disguise of logic ... 
Fast and efficient circuit topologies for finding the maximum of n kbit numbers
Yüce, B.; Uğurdağ, Hasan Fatih; Gören, S.; Dündar, G. (IEEE, 20140801)Finding the value and/or index of the maximum (or minimum) element of a set of n numbers (each with kbits) is a fundamental arithmetic operation and is needed in many applications. This paper proposes several maximumfinder ... 
Fast and efficient implementation of lightweight crypto algorithm PRESENT on FPGA through processor instruction set extension
Varıcı, Abdullah; Sağlam, Gürol; İpek, Seçkin; Yıldız, A.; Gören, S.; Aysu, A.; İskender, Deniz; Aktemur, Tankut Barış; Uğurdağ, Hasan Fatih (IEEE, 2019)As Internet of Things (IoT) technology becomes widespread, the importance of information security increases. PRESENT algorithm is a major lightweight symmetrickey encryption algorithm for IoT devices. Compared to the ... 
A fast circuit topology for finding the maximum of n kbit numbers
Yuce, B.; Uğurdağ, Hasan Fatih; Gören, S.; Dundar, G. (IEEE, 2013)Finding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (lowlatency) ... 
Fast multiplier generator for FPGAs with LUT based partial product generation and column/row compression
Kakacak, Ahmet; Guzel, Aydın Emre; Cihangir, Ozan; Gören, S.; Uğurdağ, Hasan Fatih (Elsevier, 2017)We present a new parallel integer multiplier generator for FPGAs. It combines (i) a new Generalized Parallel Counter (GPC) grouping algorithm for column compression with (ii) a LUT based partial product generation, is (iii) ... 
Fast one and twopick fixedpriority selection and muxing circuits
Tosun, Mustafa; Özkan, M. Akif; Güzel, Aydin Emre; Uğurdağ, Hasan Fatih (IEEE, 2016)Priority encoders and arbiters usually drive multiplexers (muxes). Latency optimization of priority encoders and multiplexer trees has usually been handled separately in the literature. However, in some applications with ... 
Fast parallel prefix logic circuits for n2n roundrobin arbitration
Uğurdağ, Hasan Fatih; Baskirt, O. (Elsevier, 201208)An n2n roundrobin arbiter (RRA) searches its n inputs for a 1, starting from the highestpriority input. It picks the first 1 and outputs its index in onehot encoding. RRA aims to be fair to its inputs and maintains ... 
Fast twopick n2n roundrobin arbiter circuit
Uğurdağ, Hasan Fatih; Temizkan, Fatih; Baskirt, O.; Yuce, B. (IEEE, 201206)A regular (onepick) roundrobin arbiter circuit picks one active requester (if any) out of n requesters. A twopick roundrobin arbiter selects up to two requesters. An n2n twopick roundrobin arbiter indicates the picked ... 
FPGA based DCOOFDM PHY transceiver for VLC systems
Levent, V. E.; Sağlam, Gürol; Uğurdağ, Hasan Fatih; Annafianto, Nur Fajar Rizqi; Aydın, Furkan; Tesfay, Shewit Weldu; Mohamed, Bassam Aly Abdelrahman; Elamassie, Mohammed; Kebapçı, Burak; Uysal, Murat (IEEE, 2019)Satisfying the demand for high bandwidth and low latency in Visible Light Communication (VLC) systems is a difficult challenge. VLC channels exhibit frequencyselectiveness at peakspeeds. This phenomenon generates a serious ...
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