Browsing by Subject "Low latency combinational circuit"
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Efficient combinational circuits for division by small integer constants
(IEEE, 2016)Division of an integer by an integer constant is a widely used operation and hence justifies a customized efficient implementation. There are various versions of this operation. This paper attacks a particular version of ... -
Hardware division by small integer constants
(IEEE, 2017-12)This article studies the design of custom circuits for division by a small positive constant. Such circuits can be useful for specific FPGA and ASIC applications. The first problem studied is the Euclidean division of an ...
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