Browsing by Subject "Logic synthesis"
Now showing items 1-3 of 3
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Fast parallel prefix logic circuits for n2n round-robin arbitration
(Elsevier, 2012-08)An n2n round-robin arbiter (RRA) searches its n inputs for a 1, starting from the highest-priority input. It picks the first 1 and outputs its index in one-hot encoding. RRA aims to be fair to its inputs and maintains ... -
Lossless look-up table compression for hardware implementation of transcendental functions
(IEEE, 2019)Look-Up Table (LUT) implementation of transcendental functions often offers lower latency compared to algebraic implementations at the expense of significant area penalty. MultiPartite table method (MP) can circumvent the ... -
Multi-pick round robin arbiter
(2012-08)In this thesis, we propose two multi(m)-pick Round Robin Arbiter (RRA) architectures. An m-pick RRA selects the m topmost requests out of n inputs with priority order indicated by an internally kept pointer (with an update ...
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