Tools and techniques for implementation of real-time video processing algorithms
dc.contributor.author | Levent, Vecdi Emre | |
dc.contributor.author | Güzel, Aydın Emre | |
dc.contributor.author | Tosun, M. | |
dc.contributor.author | Büyükmıhcı, Mert | |
dc.contributor.author | Aydın, Furkan | |
dc.contributor.author | Goren, S. | |
dc.contributor.author | Erbas, C. | |
dc.contributor.author | Akgun, T. | |
dc.contributor.author | Uğurdağ, Hasan Fatih | |
dc.date.accessioned | 2020-09-02T06:44:18Z | |
dc.date.available | 2020-09-02T06:44:18Z | |
dc.date.issued | 2019-01 | |
dc.identifier.issn | 1939-8018 | en_US |
dc.identifier.uri | http://hdl.handle.net/10679/6875 | |
dc.identifier.uri | https://link.springer.com/article/10.1007%2Fs11265-018-1402-7 | |
dc.description.abstract | This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off. | en_US |
dc.description.sponsorship | TÜBİTAK ; European Union's Artemis Joint Undertaking as part of project named ALMARVI | |
dc.language.iso | eng | en_US |
dc.publisher | Springer Nature | en_US |
dc.relation | info:turkey/grantAgreement/TUBITAK/114E343 | |
dc.relation.ispartof | Journal of Signal Processing Systems | |
dc.rights | restrictedAccess | |
dc.title | Tools and techniques for implementation of real-time video processing algorithms | en_US |
dc.type | Article | en_US |
dc.peerreviewed | yes | en_US |
dc.publicationstatus | Published | en_US |
dc.contributor.department | Özyeğin University | |
dc.contributor.authorID | (ORCID 0000-0002-6256-0850 & YÖK ID 118293) Uğurdağ, Fatih | |
dc.contributor.ozuauthor | Uğurdağ, Hasan Fatih | |
dc.identifier.volume | 91 | en_US |
dc.identifier.issue | 1 | en_US |
dc.identifier.startpage | 93 | en_US |
dc.identifier.endpage | 113 | en_US |
dc.identifier.wos | WOS:000455335500008 | |
dc.identifier.doi | 10.1007/s11265-018-1402-7 | en_US |
dc.subject.keywords | Hardware IP generation | en_US |
dc.subject.keywords | Real-time video processing | en_US |
dc.subject.keywords | High-level synthesis | en_US |
dc.subject.keywords | FPGA | en_US |
dc.subject.keywords | Optical flow | en_US |
dc.subject.keywords | Nested pipelining | en_US |
dc.identifier.scopus | SCOPUS:2-s2.0-85053609958 | |
dc.contributor.ozugradstudent | Levent, Vecdi Emre | |
dc.contributor.ozugradstudent | Güzel, Aydın Emre | |
dc.contributor.ozugradstudent | Büyükmıhcı, Mert | |
dc.contributor.ozugradstudent | Aydın, Furkan | |
dc.contributor.authorMale | 5 | |
dc.relation.publicationcategory | Article - International Refereed Journal - Institution Academic, PhD Student and Graduate Student |
Files in this item
Files | Size | Format | View |
---|---|---|---|
There are no files associated with this item. |
This item appears in the following Collection(s)
Share this page