Browsing Computer Science by Author "(ORCID 0000-0002-6256-0850 & YÖK ID 118293) Uğurdağ, Fatih"
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An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Uğurdağ, Hasan Fatih; Goren, S.; Aydin, N. (IEEE, 2015)Biomedical signals (BSs), which give information about the normal condition and also the inherent irregularities of our body, are expected to have non-stationary character due to the time-varying behavior of physiological ... -
Combined AES + AEGIS architectures for high performance and lightweight security applications
Şahin, Furkan; Uğurdağ, Hasan Fatih; Yalçın, T. (Springer International Publishing, 2014)AES has been the prominent block cipher since its introduction as the standard. It has been the cipher used in almost all new applications that require solid, unbreakable security with reasonable resource usage. Several ... -
Cost-benefit approach to degradation of electrolytic capacitors
Kirişken, B.; Uğurdağ, Hasan Fatih (IEEE, 2014)Aluminum electrolytic capacitors are widely used as a filter or bulky capacitor after rectification stages of switching power supplies (SMPS). Fly-back, forward, and resonant converter topologies, which are widely used in ... -
CPU design simplified
Yıldız, A.; Uğurdağ, Hasan Fatih; Aktemur, Tankut Barış; İskender, Deniz; Gören, S. (IEEE, 2018-12-10)The first goal of this paper is to introduce a simple and customizable soft CPU named VerySimpleCPU (VSCPU), which could be easily implemented on FPGAs with a complete toolchain including instruction set simulator, assembler, ... -
Darbe i̇şaretleri̇ i̇çi̇n aşırı-hızlı FPGA tabanlı eǧri̇ beti̇mlenmesi̇
Başaran, A.; Uğurdağ, Hasan Fatih; Akdoğan, T.; Güney, V. U.; Gören, S. (IEEE, 2012)Bu çalışmada anlatılan donanım 1.5 GHz Analog-Sayısal- Çevirici’den gelen darbe işaret dizisini işleyebilmekte ve darbe işaretlerini genlik, yükselme/düşme süresi ve varış zamanı parametreleriyle özetleyebilmektedir. Söz ... -
Defect-aware nanocrossbar logic mapping through matrix canonization using two-dimensional radix sort
Gören, S.; Uğurdağ, Hasan Fatih; Palaz, O. (ACM, 2011-08)Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and utilization requires logic mapping that is ... -
Efficient combinational circuits for division by small integer constants
Uğurdağ, Hasan Fatih; Bayram, A.; Levent, Vecdi Levent; Gören, S. (IEEE, 2016)Division of an integer by an integer constant is a widely used operation and hence justifies a customized efficient implementation. There are various versions of this operation. This paper attacks a particular version of ... -
Enabling difference-based dynamic partial self reconfiguration for large differences
Gören, S.; Özkurt, Ö.; Türk, Y.; Yıldız, A.; Uğurdağ, Hasan Fatih (IEEE, 2013)This paper presents a new Dynamic Partial Self Reconfiguration (DPSR) flow for Xilinx FPGAs. Leveraging the Xilinx FPGA Editor and PlanAhead tools, we provide two implementation approaches that enable partial reconfiguration ... -
Fast and efficient implementation of lightweight crypto algorithm PRESENT on FPGA through processor instruction set extension
Varıcı, Abdullah; Sağlam, Gürol; İpek, Seçkin; Yıldız, A.; Gören, S.; Aysu, A.; İskender, Deniz; Aktemur, Tankut Barış; Uğurdağ, Hasan Fatih (IEEE, 2019)As Internet of Things (IoT) technology becomes widespread, the importance of information security increases. PRESENT algorithm is a major lightweight symmetric-key encryption algorithm for IoT devices. Compared to the ... -
A fast circuit topology for finding the maximum of n k-bit numbers
Yuce, B.; Uğurdağ, Hasan Fatih; Gören, S.; Dundar, G. (IEEE, 2013)Finding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (low-latency) ... -
Fast one- and two-pick fixed-priority selection and muxing circuits
Tosun, Mustafa; Özkan, M. Akif; Güzel, Aydin Emre; Uğurdağ, Hasan Fatih (IEEE, 2016)Priority encoders and arbiters usually drive multiplexers (muxes). Latency optimization of priority encoders and multiplexer trees has usually been handled separately in the literature. However, in some applications with ... -
FPGA bitstream protection with PUFs, obfuscation, and multi-boot
Gören, S.; Özkurt, Ö.; Yıldız, Abdullah; Uğurdağ, Hasan Fatih (IEEE, 2011)With the combination of PUFs, obfuscation, and multi-boot, we are able to do the equivalent of partial bitstream encryption on low-cost FPGAs, which is only featured on high-end FPGAs. Low-cost FPGAs do not even have ... -
FPGA implementation of a dense optical flow algorithm using altera openCL SDK
Ulutaş, Umut; Tosun, Mustafa; Levent, Vecdi Emre; Büyükaydın, D.; Akgün, T.; Uğurdağ, Hasan Fatih (Springer International Publishing, 2017)FPGA acceleration of compute-intensive algorithms is usually not regarded feasible because of the long Verilog or VHDL RTL design efforts they require. Data-parallel algorithms have an alternative platform for acceleration, ... -
An in-depth look at prior art in fast round-robin arbiter circuits
Uğurdağ, Hasan Fatih; Baskirt, O. (Özyeğin University, 08.01.2011)Arbiters are found where shared resources exist such as busses, switching fabrics, processing elements. Round-robin is a fair arbitration method, where requestors get near-equal shares of a common resource or service. ... -
A multi-channel real time implementation of dual tree complex wavelet Transform in field programmable gate arrays
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Uğurdağ, Hasan Fatih (Springer International Publishing, 2016)In medical applications, biomedical acquisition systems (BASs) are frequently used in order to diagnose and monitor critical conditions such as stroke, epilepsy, Alzheimer disease, arrhythmias and etc. Biomedical signals ... -
Referanssız görüntü bloklanma ölçümü için yeni bir yöntem
Ozansoy, Koray; Özer, N.; Dönmez, F.; Uğurdağ, Hasan Fatih (IEEE, 2014)Internet’te ve servis sağlayıcı ağlarında video trafiğinin tavan yaptığı günümüzde otomatik görüntü kalitesi ölçümünün faydaları aşikardır. Bu ölçümlerin birçok uygulamada gerçekzamanlı yapılması gerekir ve de bu “Referanssız” ... -
A robotics summer camp for high school students: pipelines activities promoting careers in engineering fields
Ayar, M.; Yalvaç, B.; Uğurdağ, Hasan Fatih; Şahin, A. (American Society for Engineering Education, 2013-06)In this paper we discuss the lived-experiences and the career interests of 27 high school students who participated in a two-week Robotics summer camp in 2012. The summer camp was designed by a team of engineering faculty, ... -
Software UART: A use case for VSCPU worst-case execution time analyzer
Yıldız, A.; İskender, Deniz; Özlü, G.; Uğurdağ, Hasan Fatih; Aktemur, Tankut Barış; Gören, S. (IEEE, 2019)This paper presents our early results of the development of a Worst-Case Execution Time (WCET) analyzer for VSCPU by implementing a software UART system. Our WCET analyzer takes a C program as input and gives the time taken ... -
Synthesis of clock trees for sampled-data analog IC blocks
Yüce, B.; Korkmaz, S.; Esen, V. B.; Temizkan, Fatih; Tunç, Cihan; Güner, Gökhan; Başkaya, I. F.; Agi, İ.; Dündar, G.; Uğurdağ, Hasan Fatih (IEEE, 2013)This paper describes a methodology for automated design of clock trees in Sampled-Data Analog Circuits (SDACs). The current practice in the industry and academia for clock tree design of SDACs is a manual process, which ... -
Using high-level synthesis for rapid design of video processing pipes
Güzel, Aydin Emre; Levent, Vecdi Emre; Tosun, Mustafa; Özkan, M. Akif; Akgun, T.; Büyükaydın, D.; Erbas, C.; Uğurdağ, Hasan Fatih (IEEE, 2016)In this work, we share our experience in using High-Level Synthesis (HLS) for rapid development of an optical flow design on FPGA. We have performed HLS using Vivado HLS as well as a HLS tool we have developed for the ...
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