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A fast circuit topology for finding the maximum of n k-bit numbers

dc.contributor.authorYuce, B.
dc.contributor.authorUğurdağ, Hasan Fatih
dc.contributor.authorGören, S.
dc.contributor.authorDundar, G.
dc.contributor.departmentElectrical & Electronics Engineering
dc.contributor.ozuauthorUĞURDAĞ, Hasan Fatih
dc.date.accessioned2016-06-30T12:33:35Z
dc.date.available2016-06-30T12:33:35Z
dc.date.issued2013
dc.descriptionDue to copyright restrictions, the access to the full text of this article is only available via subscription.
dc.description.abstractFinding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (low-latency) circuits to carry out this operation. We propose a fast circuit topology called Array-Based maximum finder (AB) to determine both value and address of the maximum element within an n-element set of k-bit binary numbers. AB is based on carrying out all of the required comparisons in parallel and then simultaneously computing the address as well as the value of the maximum element. This approach ends up with only one comparator on the critical path, followed by some selection logic. The time complexity of the proposed architecture is O(log2n + log2k) whereas the area complexity is O(n2k). We developed RTL code generators for AB as well as its competitors. These generators are scalable to any value of n and k. We applied a standard-cell based iterative synthesis flow that finds the optimum time constraint through binary search. The synthesis results showed that AB is 1.2-2.1 times (1.6 times on the average) faster than the state-of-the-art.
dc.identifier.doi10.1109/ARITH.2013.35
dc.identifier.endpage66
dc.identifier.issn1063-6889
dc.identifier.scopus2-s2.0-84881224847
dc.identifier.startpage59
dc.identifier.urihttp://hdl.handle.net/10679/4233
dc.identifier.urihttps://doi.org/10.1109/ARITH.2013.35
dc.identifier.wos000326337100008
dc.language.isoengen_US
dc.peerreviewedyes
dc.publicationstatuspublisheden_US
dc.publisherIEEE
dc.relation.ispartofProceedings - Symposium on Computer Arithmetic
dc.relation.publicationcategoryInternational
dc.rightsinfo:eu-repo/semantics/restrictedAccess
dc.subject.keywordsComputational complexity
dc.subject.keywordsDigital arithmetic
dc.subject.keywordsIterative methods
dc.subject.keywordsNetwork topology
dc.subject.keywordsProgram compilers
dc.titleA fast circuit topology for finding the maximum of n k-bit numbersen_US
dc.typeConference paperen_US
dspace.entity.typePublication
relation.isOrgUnitOfPublication7b58c5c4-dccc-40a3-aaf2-9b209113b763
relation.isOrgUnitOfPublication.latestForDiscovery7b58c5c4-dccc-40a3-aaf2-9b209113b763

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