Browsing by Author "Levent, Vecdi Emre"
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An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Uğurdağ, Hasan Fatih; Goren, S.; Aydin, N. (IEEE, 2015)Biomedical signals (BSs), which give information about the normal condition and also the inherent irregularities of our body, are expected to have non-stationary character due to the time-varying behavior of physiological ... -
Field programmable gate arrays implementation of dual tree complex wavelet transform
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Goren, S.; Aydin, N. (IEEE, 2015)Due to the inherent time-varying characteristics of physiological systems, most biomedical signals (BSs) are expected to have non-stationary character. Therefore, any appropriate analysis method for dealing with BSs should ... -
FPGA implementation of a dense optical flow algorithm using altera openCL SDK
Ulutaş, Umut; Tosun, Mustafa; Levent, Vecdi Emre; Büyükaydın, D.; Akgün, T.; Uğurdağ, Hasan Fatih (Springer International Publishing, 2017)FPGA acceleration of compute-intensive algorithms is usually not regarded feasible because of the long Verilog or VHDL RTL design efforts they require. Data-parallel algorithms have an alternative platform for acceleration, ... -
A multi-channel real time implementation of dual tree complex wavelet Transform in field programmable gate arrays
Canbay, F.; Levent, Vecdi Emre; Serbes, G.; Uğurdağ, Hasan Fatih (Springer International Publishing, 2016)In medical applications, biomedical acquisition systems (BASs) are frequently used in order to diagnose and monitor critical conditions such as stroke, epilepsy, Alzheimer disease, arrhythmias and etc. Biomedical signals ... -
Output domain downscaler
Büyükmıhçı, M.; Levent, Vecdi Emre; Guzel, Aydın Emre; Ates, Ozgur; Tosun, Mustafa; Akgün, T.; Erbas, C.; Gören, S.; Uğurdağ, Hasan Fatih (ISCIS 2016: Computer and Information Sciences, 2016)This paper offers an area-efficient video downscaler hardware architecture, which we call Output Domain Downscaler (ODD). ODD is demonstrated through an implementation of the bilinear interpolation method combined with ... -
Rapid design of real-time image fusion on FPGA using HLS and other techniques
Aydın, Furkan; Uğurdağ, Hasan Fatih; Levent, Vecdi Emre; Güzel, Aydın Emre; Annafianto, Nur Fajar Rızqı; Özkan, M. A.; Akgun, T.; Erbas, C. (IEEE, 2018)During the process of implementing a parameterized hardware IP generator for an image fusion algorithm, we had a chance to test various tools and techniques such as HLS, pipelining, and PCIe logic/software porting, which ... -
Tools and techniques for implementation of real-time video processing algorithms
Levent, Vecdi Emre; Güzel, Aydın Emre; Tosun, M.; Büyükmıhcı, Mert; Aydın, Furkan; Goren, S.; Erbas, C.; Akgun, T.; Uğurdağ, Hasan Fatih (Springer Nature, 2019-01)This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques ... -
Tools and tecniques for implementation of real-time video processing algorithms
Levent, Vecdi Emre (2018-09)Hardware implementation of video processing algorithms, which are usually real-time by nature, need architectural exploration so that we achieve the required performance with minimal cost. In addition, the video algorithm ... -
Using high-level synthesis for rapid design of video processing pipes
Güzel, Aydin Emre; Levent, Vecdi Emre; Tosun, Mustafa; Özkan, M. Akif; Akgun, T.; Büyükaydın, D.; Erbas, C.; Uğurdağ, Hasan Fatih (IEEE, 2016)In this work, we share our experience in using High-Level Synthesis (HLS) for rapid development of an optical flow design on FPGA. We have performed HLS using Vivado HLS as well as a HLS tool we have developed for the ...
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