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dc.contributor.authorUğurdağ, Hasan Fatih
dc.contributor.authorTemizkan, Fatih
dc.contributor.authorBaskirt, O.
dc.contributor.authorYuce, B.
dc.date.accessioned2014-07-11T08:34:14Z
dc.date.available2014-07-11T08:34:14Z
dc.date.issued2012-06
dc.identifier.issn0013-5194
dc.identifier.urihttp://hdl.handle.net/10679/493
dc.identifier.urihttp://ieeexplore.ieee.org/xpl/abstractKeywords.jsp?arnumber=6222087
dc.descriptionDue to copyright restrictions, the access to the full text of this article is only available via subscription.en_US
dc.description.abstractA regular (one-pick) round-robin arbiter circuit picks one active requester (if any) out of n requesters. A two-pick round-robin arbiter selects up to two requesters. An n2n two-pick round-robin arbiter indicates the picked requests with (at most) two-hot n-bit output. A round-robin arbiter is fair to its requesters and does this by repeatedly moving its highest priority pointer to the position immediately next to the second requester picked. Presented is the circuit architecture and VLSI implementation of a new scalable two-pick round-robin arbiter with low latency, which is compared with previous work based on logic synthesis results.en_US
dc.language.isoengen_US
dc.publisherIEEEen_US
dc.relation.ispartofElectronics Letters
dc.rightsrestrictedAccess
dc.titleFast two-pick n2n round-robin arbiter circuiten_US
dc.typeArticleen_US
dc.peerreviewedyesen_US
dc.publicationstatuspublisheden_US
dc.contributor.departmentÖzyeğin University
dc.contributor.authorID(ORCID 0000-0002-6256-0850 & YÖK ID 118293) Uğurdağ, Fatih
dc.contributor.ozuauthorUğurdağ, Hasan Fatih
dc.identifier.volume48
dc.identifier.issue13
dc.identifier.startpage759
dc.identifier.endpage760
dc.identifier.wosWOS:000306707700013
dc.identifier.doi10.1049/el.2012.0307
dc.subject.keywordsAsynchronous circuitsen_US
dc.subject.keywordsLogic designen_US
dc.identifier.scopusSCOPUS:2-s2.0-84864215220
dc.contributor.ozugradstudentTemizkan, Fatih
dc.contributor.authorMale2


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