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dc.contributor.authorYüce, B.
dc.contributor.authorKorkmaz, S.
dc.contributor.authorEsen, V. B.
dc.contributor.authorTemizkan, Fatih
dc.contributor.authorTunç, Cihan
dc.contributor.authorGüner, Gökhan
dc.contributor.authorBaşkaya, I. F.
dc.contributor.authorAgi, İ.
dc.contributor.authorDündar, G.
dc.contributor.authorUğurdağ, Hasan Fatih
dc.date.accessioned2016-02-15T13:38:32Z
dc.date.available2016-02-15T13:38:32Z
dc.date.issued2013
dc.identifier.isbn978-1-4799-2095-2
dc.identifier.urihttp://hdl.handle.net/10679/2352
dc.identifier.urihttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6673154
dc.descriptionDue to copyright restrictions, the access to the full text of this article is only available via subscription.
dc.description.abstractThis paper describes a methodology for automated design of clock trees in Sampled-Data Analog Circuits (SDACs). The current practice in the industry and academia for clock tree design of SDACs is a manual process, which is time-consuming and error-prone. Clock tree design in digital domain, however, is fully automated and is carried out by what we call Clock Tree Synthesis (CTS) software. In spite of some critical differences, SDAC clock tree design problem has fundamental similarities with its digital counterpart. As a result, we were able to construct a methodology for SDACs around a commercial digital CTS software and a set of Perl & Tcl scripts. We will explain our methodology using a 10-bit 180 MHz 2-stage ADC as a test circuit.
dc.description.sponsorshipTÜBİTAK
dc.language.isoengen_US
dc.publisherIEEE
dc.relationinfo:turkey/grantAgreement/TUBITAK/110E061
dc.relation.ispartofDesign & Test Symposium, 2013 East-West
dc.rightsrestrictedAccess
dc.titleSynthesis of clock trees for sampled-data analog IC blocksen_US
dc.typeConference paperen_US
dc.peerreviewedyes
dc.publicationstatuspublisheden_US
dc.contributor.departmentÖzyeğin University
dc.contributor.authorID(ORCID 0000-0002-6256-0850 & YÖK ID 118293) Uğurdağ, Fatih
dc.contributor.ozuauthorUğurdağ, Hasan Fatih
dc.identifier.startpage1
dc.identifier.endpage4
dc.identifier.wosWOS:000332042400076
dc.identifier.doi10.1109/EWDTS.2013.6673154
dc.subject.keywordsAnalogue integrated circuits
dc.subject.keywordsAnalogue-digital conversion
dc.subject.keywordsElectronic engineering computing
dc.subject.keywordsIntegrated circuit design
dc.subject.keywordsIntegrated circuit testing
dc.identifier.scopusSCOPUS:2-s2.0-84893450993
dc.contributor.ozugradstudentTemizkan, Fatih
dc.contributor.ozugradstudentTunç, Cihan
dc.contributor.ozugradstudentGüner, Gökhan
dc.contributor.authorMale4
dc.relation.publicationcategoryConference Paper - International - Institutional Academic Staff and Graduate Student


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