Browsing by Author "Uğurdağ, H. Fatih"
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Analog clock tree synthesis
Güner, G. (201401)Anahtarlamalı analog devrelerin (AAD) saat ağı tasarımı ciddi zaman gerektiren ve yongaların tekrar elden geçirilmesine sebep olabilecek hatalara açık, elle yapılan bir işlemdir. Bu probleme otomatik ya da yarıotomatik ... 
An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays
Canbay, F.; Levent, V. E.; Serbes, G.; Uğurdağ, H. Fatih; Goren, S.; Aydin, N. (IEEE, 2015)Biomedical signals (BSs), which give information about the normal condition and also the inherent irregularities of our body, are expected to have nonstationary character due to the timevarying behavior of physiological ... 
Combined aes + aegis architectures for high performance and lightweight security applications
Şahin, F. (201408)Günümüzde kriptografi banka kartlarından telefonlara, arabalardan haberleşme araçlarına ve bulut hizmetlerine kadar pek çok alana girdi. Digital bilgiyi yetkilendirilmemiş erişimlere karşı korumak için bir çok şifreleme ... 
Combined AES + AEGIS architectures for high performance and lightweight security applications
Şahin, F.; Uğurdağ, H. Fatih; Yalçın, T. (Springer International Publishing, 2014)AES has been the prominent block cipher since its introduction as the standard. It has been the cipher used in almost all new applications that require solid, unbreakable security with reasonable resource usage. Several ... 
Comparison of textindependent speaker verification systems in a multiclass, semiautomatic detection scenario
Yeşil, F. (201306)Performance of the speaker veri cation systems is typically measured based on their binary decision accuracy. Soft outputs of the systems are used mostly for calibration or multiple system combination purposes. However, ... 
Costbenefit approach to degradation of electrolytic capacitors
Kirişken, B.; Uğurdağ, H. Fatih (IEEE, 2014)Aluminum electrolytic capacitors are widely used as a filter or bulky capacitor after rectification stages of switching power supplies (SMPS). Flyback, forward, and resonant converter topologies, which are widely used in ... 
Darbe i̇şaretleri̇ i̇çi̇n aşırıhızlı FPGA tabanlı eǧri̇ beti̇mlenmesi̇
Başaran, A.; Uğurdağ, H. Fatih; Akdoğan, T.; Güney, V. U.; Gören, S. (IEEE, 2012)Bu çalışmada anlatılan donanım 1.5 GHz AnalogSayısal Çevirici’den gelen darbe işaret dizisini işleyebilmekte ve darbe işaretlerini genlik, yükselme/düşme süresi ve varış zamanı parametreleriyle özetleyebilmektedir. Söz ... 
Defectaware nanocrossbar logic mapping through matrix canonization using twodimensional radix sort
Gören, S.; Uğurdağ, H. Fatih; Palaz, O. (ACM, 201108)Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuckopen/closed, broken nanowires. Achieving reasonable yield and utilization requires logic mapping that is ... 
Efficient combinational circuits for division by small integer constants
Uğurdağ, H. Fatih; Bayram, A.; Levent, V. E.; Gören, S. (IEEE, 2016)Division of an integer by an integer constant is a widely used operation and hence justifies a customized efficient implementation. There are various versions of this operation. This paper attacks a particular version of ... 
Enabling differencebased dynamic partial self reconfiguration for large differences
Gören, S.; Özkurt, Ö.; Türk, Y.; Yıldız, A.; Uğurdağ, H. Fatih (IEEE, 2013)This paper presents a new Dynamic Partial Self Reconfiguration (DPSR) flow for Xilinx FPGAs. Leveraging the Xilinx FPGA Editor and PlanAhead tools, we provide two implementation approaches that enable partial reconfiguration ... 
Experiences on the road from EDA developer to designer to educator
Uğurdağ, H. Fatih (IEEE, 2013)This paper will coin some concepts that came to being as an engineer once made a journey from EDA developer of a behavioral synthesis tool to RTL designer and then on to academia. The EDA developer in disguise of logic ... 
Fast and efficient circuit topologies for finding the maximum of n kbit numbers
Yüce, B.; Uğurdağ, H. Fatih; Gören, S.; Dündar, G. (IEEE, 20140801)Finding the value and/or index of the maximum (or minimum) element of a set of n numbers (each with kbits) is a fundamental arithmetic operation and is needed in many applications. This paper proposes several maximumfinder ... 
A fast circuit topology for finding the maximum of n kbit numbers
Yuce, B.; Uğurdağ, H. Fatih; Gören, S.; Dundar, G. (IEEE, 2013)Finding the value and/or address (position) of the maximum element of a set of binary numbers is a fundamental arithmetic operation. Numerous systems, which are used in different application areas, require fast (lowlatency) ... 
Fast multiplier generator for FPGAs with LUT based partial product generation and column/row compression
Kakacak, A.; Guzel, A. E.; Cihangir, O.; Gören, S.; Uğurdağ, H. Fatih (Elsevier, 2017)We present a new parallel integer multiplier generator for FPGAs. It combines (i) a new Generalized Parallel Counter (GPC) grouping algorithm for column compression with (ii) a LUT based partial product generation, is (iii) ... 
Fast one and twopick fixedpriority selection and muxing circuits
Tosun, M.; Özkan, M. A.; Güzel, A. E.; Uğurdağ, H. Fatih (IEEE, 2016)Priority encoders and arbiters usually drive multiplexers (muxes). Latency optimization of priority encoders and multiplexer trees has usually been handled separately in the literature. However, in some applications with ... 
Fast parallel prefix logic circuits for n2n roundrobin arbitration
Uğurdağ, H. Fatih; Baskirt, O. (Elsevier, 201208)An n2n roundrobin arbiter (RRA) searches its n inputs for a 1, starting from the highestpriority input. It picks the first 1 and outputs its index in onehot encoding. RRA aims to be fair to its inputs and maintains ... 
Fast twopick n2n roundrobin arbiter circuit
Uğurdağ, H. Fatih; Temizkan, F.; Baskirt, O.; Yuce, B. (IEEE, 201206)A regular (onepick) roundrobin arbiter circuit picks one active requester (if any) out of n requesters. A twopick roundrobin arbiter selects up to two requesters. An n2n twopick roundrobin arbiter indicates the picked ... 
Fast, secure, and remote multiboot of FPGAs
Yıldız, A. (201209)The purpose of this thesis is to develop an efficient framework to implement secure FPGAbased (Field Programmable Gate Array) systems. An FPGA is a reconfigurable device that has the ability to adapt the hardware during ... 
FPGA based particle identification in high energy physics experiments
Uğurdağ, H. Fatih; Başaran, A.; Akdogan, T.; Güney, V. U.; Gören, S. (IEEE, 2012)High energy physics experiments require onthefly processing of signals from many particle detectors. Such signals contain a high and fluctuating rate of pulses. Pulse shape hints particle type, and the amplitude relates ... 
FPGA bitstream protection with PUFs, obfuscation, and multiboot
Gören, S.; Özkurt, Ö.; Yıldız, A.; Uğurdağ, H. Fatih (IEEE, 2011)With the combination of PUFs, obfuscation, and multiboot, we are able to do the equivalent of partial bitstream encryption on lowcost FPGAs, which is only featured on highend FPGAs. Lowcost FPGAs do not even have ...
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